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Preventing leaks from happening is apparently not part of the 'trusted foundation': Their newsroom story is that we will be able to 'learn how Intel, together with partners and customers, is building the trusted foundation for computing in a data-centric world' during the event. Intel can, of course, totally be trusted with security which is why they are participating in panel discussions at the virtual Defcon 28 conference held this weekend. There's also firmware and documentation for various versions of Intels secure management engine (ME) in the first document dump. All of them will have rather low base clocks ranging from 2.3 to 2.7 GHz. The i9 processors will have a single core boost of 5.3 GHz, the i7's will boost to 5.1 or 5.0 and the i5 chips will boost to 4.6 or 4.5. Those who want more power can get Comet Lake H or Comet Lake U processors. Both will have a maximum of 4 cores, Thunderbolt, PCIe 4, 802.11ax WIFI, support LPDDR4x and LPDDR5 (up to 5400 MT/s) RAM and both will be made on a 10nm process. Tiger Lake UP3 will have a 15-28W TDP while the even low-power UP4 design will be limited to 7-15W. Thin and light notebooks and laptops will get new Tiger Lake UP3 and Tiger Lake UP4 chips available. The Mobile Platform 5Q Roadmap ( ww18-20-intel-mobile-business-5q-nda-roadmap-with-wm.pptm) may be interesting to those wondering what kind of upcoming mobile processors Intel has up their sleeve.

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If you want to learn how to make your own motherboard for Intels Tiger Lake or Tiger Island platforms then there's files with schemas, block diagrams, programming guides and instructions that will let you do that. Many of the files are clearly meant for Intels partners. The same Whitley/Cedar Island Platform Message of the Week has a section on 'Intel Speed Select Technology' where they stress that it would be good to 'Avoid customer from trying various knobs in BIOS to use SST features.' The slide in question is from May 2020, so this may not be a problem with their current Ice Lake parts. Intels internal slide notes that they do not expect to get any work-around for HCC silicon ES1/ES2 parts but will have a fix implemented in XCC ES1 part and future Ice Lake parts. It would seem that Intel replaced Have you tried turning it off and back on again? with 'don't turn it off, ever during early Ice Lake based Xeon processor releases. Whitley/Cedar Island Platform Message of the Week message for w(May 3rd to May 9th)

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